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MS Final Exam – Bohui Xiao

Ring Amplifiers for Power Efficient Low-Drop-Out Regulators

This work uses ring amplifier as the error amplifier in a capless LDO. The inherent dynamic operation and inverter based topology of the ring amplifiers results in a simple LDO structure while achieving faster settling time and very low static power consumption. The proposed ring amplifier based capless LDO is designed in 180nm CMOS process. A current-starved-inverter based ring amplifier is chosen for implementation. The LDO is designed for load current variation up to 40mA with a supply voltage of 1.1V and dropout voltage of 100mV. The simulation result shows a settling time of hundreds of nanoseconds when output current changes from 100uA to 40mA. The quiescent current of the LDO in no load condition is about 6.5uA. The proposed LDO also shows stable transient response for a wide range of the output capacitance from 0 to 400pF.

Major Advisor: Un-Ku Moon
Committee: Arun Natarajan
Committee: Tejasvi Anand
GCR: Jimmy Yang

Monday, November 26, 2018 at 1:00pm to 3:00pm

Kelley Engineering Center, 1126
110 SW Park Terrace, Corvallis, OR 97331

Event Type

Lecture or Presentation

Event Topic


College of Engineering, Electrical Engineering and Computer Science
Contact Name

Calvin Hughes

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