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110 SW Park Terrace, Corvallis, OR 97331

Machine Learning Inspired Wireline Link Allowing High Energy Efficiency for Two Architectures: One without Any Equalizer Achieving 32.6dB Channel Loss in 4.5pJ/bit, One with Small Equalizers Achieving 44.7dB Channel Loss in 7.3pJ/bit

The proposed machine learning inspired approach aims to achieve high energy efficiency by eliminating or reducing the use of multiple equalization taps that are present in a conventional wireline transceiver. Eliminating the requirement of a high-resolution analog to digital converter (ADC) and a power-hungry digital signal processing (DSP) backend, which implements heavy digital equalizers, helps to improve energy efficiency. In the proposed machine learning inspired approach, we encode the data on the transmitter such that the encoding gives identifiable attributes to the data waveform. The feature extraction block at the receiver extracts the information of the shape of the received data waveform. These features are provided to the classifier. The classifier is trained for a given communication channel to identify the incoming data based on the knowledge of (a) the features of the received waveform and (b) the attributes of encoded data. Two machine learning inspired wireline transceiver architectures are implemented in TSMC 65nm CMOS process. Measurement results show that the equalizer-free ML-inspired transceiver can compensate for 32.6dB channel loss at 16Gb/s with 4.5pJ/bit energy efficiency. The second ML-inspired transceiver with small equalizers (2-tap FFE on transmitter, 4dB peaking CTLE on receiver) shows measurement results with 7.3pJ/bit energy efficiency by compensating for 44.7dB channel loss at 13.8Gb/s.

MAJOR ADVISOR: Tejasvi Anand
COMMITTEE: Un-Ku Moon
COMMITTEE: Matthew Johnston
COMMITTEE: Arun Natarajan
GCR: Leonard Coop

  • Brian Levy

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