Switched-capacitor Power Amplifier with Enhanced Power Back-off Efficiency & Linearity
Nowadays, wireless communication systems use high-order quadrature amplitude modulation (QAM). This requires power amplifiers (PA) achieve both high efficiency and linearity simultaneously. For the efficiency, the CMOS switched-capacitor power amplifier (SCPA) architecture proposed in 2011 enabled the design of fully-integrated radio frequency (RF) transmitters with much higher power-added efficiency (PAE) than previous approaches. In order to further improve the power back-off (PBO) efficiency and hence the overall efficiency of the transmitter, an eight-core Class-G SCPA is proposed with an eight-way digitally-scalable transformer (DST). Eight seamless efficiency peaks are introduced at the 0dB, 2.5dB, 6dB, 8.5dB, 12dB, 14.5dB, 18dB and 24dB PBO levels. As for linearity, low error vector magnitude (EVM) and adjacent channel power ratio (ACPR) are required for high-speed wireless communication system. With carefully design, SCPA can achieve good EVM without digital pre-distortion (DPD). However, the undesired spurs still need to be reduced especially the third order counter inter-modulation products (C-IM3) when signal concentrates in a narrow band. Based on the analysis of the nonlinearity in IQ-sharing SCPA, a baseband harmonic-rejection (BBHR) technique is used to minimize the C-IM3. Also, using a Wilkinson combiner, the cross-coupling between two sub-SCPAs is isolated to enable a linear harmonic-rejection summation.
Major Advisor: David Allstot
Committee: Gabor Temes
Committee: Arun Natarajan
Committee: Tejasvi Anand
GCR: William H. Warnes
Wednesday, January 27, 2021 at 3:00pm to 5:00pm
Virtual EventDakota Nelson
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