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Robust Computing Systems: From Today to the N3XT 1,000X

Michael and Judith Gaulke Distinguished Lecture Series

Subhasish Mitra
Professor of Electrical Engineering and of Computer Science
Stanford University

Abstract
Future computing systems require research breakthroughs in the following areas:

  • Robustness: Existing validation and test methods barely cope with today’s complexity. Reliability failures, largely benign in the past, are becoming visible at the system level. Security is a major concern at both hardware and software levels.
  • Performance: Energy benefits of silicon have plateaued (power wall). Coming generations of abundant-data applications (e.g., machine learning) are dominated by off-chip memory accesses (memory wall).
  • New applications: Neuro- and bio-sciences create tremendous opportunities for new computing systems, from implants to understanding brain functions.

This talk presents an overview of my group’s research in the above areas, and particularly emphasizes complexity and performance:

  • QED and Symbolic QED dramatically improve pre-silicon verification and post-silicon validation. Difficult bugs can now be detected and localized automatically, in a few minutes to a few hours. In contrast, existing approaches might take weeks (or months) of intense manual work with limited success. Industrial case studies show 8x-60x improved verification productivity using QED techniques.
  • N3XT leverages emerging nanotechnologies to create new architectures that overcome the memory wall and the power wall. N3XT targets 1,000x energy efficiency improvements for future computing systems. N3XT hardware prototypes represent leading examples of transforming scientifically-interesting nanomaterials and nanodevices into actual nanosystems.

Speaker Bio
Subhasish Mitra is Professor of Electrical Engineering and of Computer Science at Stanford University. He directs the Stanford Robust Systems Group, co-leads the Computation focus area of the Stanford SystemX Alliance, and is a faculty member of the Stanford Wu Tsai Neurosciences Institute. Prof. Mitra also holds the Carnot Chair of Excellence in Nanosystems at CEA-LETI in Grenoble, France. His research ranges across robust computing, nanosystems, electronic design automation, and neurosciences. Results from his research group have been widely deployed by industry and have inspired significant development efforts by government and research organizations in multiple countries.

Jointly with his students and collaborators, Prof. Mitra demonstrated the first carbon nanotube computer and the first three-dimensional nanosystem with computation immersed in data storage. These demonstrations received wide-spread recognition: cover of NATURE, Research Highlight to the United States Congress by the National
Science Foundation, and highlight as "important, scientific breakthrough" by news organizations around the world.

In the field of robust computing, Prof. Mitra and his students created key approaches for soft error resilience, circuit failure prediction, on-line self-test and diagnostics, and QED (Quick Error Detection) design verification and system validation. His earlier work on X-Compact test compression at Intel Corporation has proven essential to cost-effective manufacturing and high-quality testing of almost all electronic systems across the industry. X-Compact and its derivatives have been implemented in widely-used commercial Electronic Design Automation tools.

Prof. Mitra's honors include the ACM SIGDA / IEEE CEDA Newton Technical Impact Award in Electronic Design Automation (a test of time honor), the Semiconductor Research Corporation's Technical Excellence Award (for innovation that significantly enhances the semiconductor industry), the Intel Achievement Award (Intel’s highest corporate honor), and the United States Presidential Early Career Award for Scientists and Engineers from the White House. He and his students have published award-winning papers at major venues: ACM/IEEE Design Automation Conference, IEEE International Solid-State Circuits Conference, ACM/IEEE International Conference on Computer-Aided Design, IEEE International Test Conference, IEEE Transactions on CAD, IEEE VLSI Test Symposium, and the Symposium on VLSI Technology. At Stanford, he has been honored several times by graduating seniors "for being important to them during their time at Stanford."

Prof. Mitra has served on the Defense Advanced Research Projects Agency's (DARPA) Information Science and Technology Board as an invited member. He is a Fellow of the Association for Computing Machinery (ACM) and a Fellow of the Institute of Electrical and Electronics Engineers (IEEE).

Monday, May 6 at 4:00pm to 4:50pm


Learning Innovation Center (LINC), 200
165 SW Sackett Place, Corvallis, OR 97321

Event Type

Lecture or Presentation

Event Topic

Research

Organization
College of Engineering, Electrical Engineering and Computer Science
Contact Name

Raviv Raich

Contact Email

raviv.raich@oregonstate.edu

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